System-Level Software and Architectural Support for Noc-Based Mpsocs

On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC -...
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On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC - NoCMaker) that allows design, simulation and fast-prototype of NoC-based systems, as well as the trade-offs on the design of Network Interfaces (NI) to provide interoperability between cores of different protocols (AMBA/OCP-IP) with Quality-of-Service (QoS) support at a reasonable power and area costs. In the second part, the book tries to shed light on system-level software, runtime QoS support and middleware APIs, and a MPI-like parallel programming model (ocMPI), which offers SW programmers a way to express message-passing parallelism on NoC-based MPSoCs. This book should be especially useful for researchers on the field of parallel embedded computing on many- core on-chip systems.